Next-Gen Chips

Google is Working to Create Next-Gen Chips Based on AI

Google is working on next-gen chips which can reduce the time taken for designing purpose from several months to few hours. It has changed the shape of the world like none other thing. And never before the invention of chip, the world changed with such a pace. After the involvement of Google in next-gen chips, it is not going to slow. The above-mentioned prediction is just a single clue. There will be much more to come after the releasing of next- gen chips. Isn’t it amazing? How it can be possible and what is the story behind? You will get to know in this article. let us have a brief history of chips and basic terms used in business that need to be understood first.


These all are different names of one thing. Basically, electronic circuit is a composition of different electronic components like resistors, transistors, capacitors, inductors and diodes connected through wires. This is the base of electronic circuit. Now the integration of these type of circuits at one small place makes an integrated electronic circuit. That integrated electronic circuit is what you can call a chip or integrated chip IC or microchip or simply circuit. All are the different names of a same thing. This basic element used in their composition is silicon, so we can call them silicon chips.

Circuits can be made by connecting different wires also, but here we are discussing about the electronics circuits which are operatable at very low voltage, so this low voltage-based circuit was the foundation of modern computer, and what we are going to see in coming days, the next-gen chips, are latest form of those circuits.

History Of Integrated Circuit:

In 1958, Jack Kilby successfully demonstrated the working of integrated circuit for the first time. He is remembered as the founder of modern age computers and was awarded with Nobel prize in 2000 for the invention of first integrated circuit. Initially, TTL ICs, the transistor-transistor logic-based ICS were used in in 60s to 70s. Then MOS integrated circuits were made. They were made of metal oxide semiconductors. Mos based computers were built to attain high density processing like in calculators and aerodynamics.

Then an organization named ITRS international technology roadmap for semiconductors was made, and it worked a lot on the size, capacity and working of chips. That organization put their working successfully and produced 10s microns into 600mm square. After that, ITRS was replaced by IRDS international roadmap for devices and systems. They produced MOSFET metal oxide semiconductor field effect transistors, and fabricated that circuit in a single layer of silicon chip. Making it more compact and faster.

Planning And Working Of Google On Next-Gen Chips:

There are several blocks when it comes to divide a computer chip. Every bock is actually a whole module. For example, compute unit and memory subsystem, etc. All of these blocks that are connected by a wire, are to be described through memory components or standard cells, etc. The process of floor planning of chips needs netlists to get placed onto such grids that are two dimensional. These grids are called as canvases. This way, the metrics for performance such as timing, and power consumption are to be optimized. It is then done by holding to the restrictions on certain aspects like density.

Told by a dissertation help firm, a certain task handled by the algorithm of Google is floor planning. It requires the designers, the human designers, whose abilities or work is for aid of compute tools. The reason is finding the best layout. This layout is on a silicon die for the sub systems of a chip. These components have different things, for example, GPUs, memory cores as well as CPUs. All of these use several kilometers of the wire that is called as minuscule wire and these components are connected together in a specific way. It is important to decide wisely that what should be the placement of all components on die. Because there is a direct impact of the decision of this placements that affects the speed and efficiency of the chip. Considering the aspect and scaling of manufacturing of chip as well as computational cycles, there can be great effects if even the changes in placement are of nanometer.


An algorithm has been trained by the engineers of Google. It is on a dataset that is of 10,000 chip floor plans. These plans are of different quality extents. Out of them, some have been made randomly. Among all these designs, every design has a special aspect. That is related to getting a tag with a certain reward function. This reward function is based on the success of this design itself. It means, it is to be awarded by the capability of different metrics, for example, the use of power and the length of the wire that how much it is required. Now, the algorithm uses this data in order to discern between floor plans that which floor plan is good and which is bad. Furthermore, in turn, it generates the designs of its own.

Difference In Designs:

Google’s involvement in next-gen chips is based on AI. Google algorithm of chip designing makes things in certain ways and there is difference between the floor plans made by humans. There is not a proper way of its organization or we can say a significant symmetry. Sub systems seem as they are scattered around the silicon. Instead of laying components in neat and organized row on die, there is a random hustle. There is an illustration named as Nature, that illustration shows the difference between both. It shows that designs made by humans are on the left whereas the designs that are made through machine learning or AI are on the right. Hence proving that there must be a visible difference in performance of both.


The work of Google on next-gen chips that is based on AI is still going on. Despite having a difference between performance such as AI designs and human made designs, future expectations are quite high.

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